One Day Course on Using JTAG Technology for Software Debugging

Date: Thursday, December 17, 2009 Place: Hotel The Capitol, Raj Bhavan Road, Bangalore -560 001. Tel: 91 80 2228 1234 Time 9.30 AM to 5.00 PM.

Conventional (Traditional) Methods of Software Debugging

  • Debug Monitor
  • In -Circuit Emulator
  • Debug Messages and Indicators
  • Scope and Limitations of these methods

JTAG Technology – An Introduction

  • The Boundary Scan Architecture.
  • Test Access Port (TAP)
  • Access to System Bus, Memory, Instructions and Data.
  • Scope and Limitations for Debug

JTAG Requirements for Basic Debugging Features

  • Introduction to Debug Architecture of Microprocessor / Core – ARM7 as an example.
  • JTAG access to processor internals through processor's Debug Architecture
  • Breakpoints – Software, Hardware and Complex

Debugging for Board Bring Up.

  • Register files and processor initializations
  • Libraries for debugging support

Flashing from a debugger using JTAG access

  • Flash utilities
  • Programming Flash though Boundary Scan.

JTAG Requirements for Advanced Debugging Features

  • Real-time or full speed debugging
  • Trace, Trace Buffers and Triggers
  • Support for Trace though JTAG

Insights into JTAG adapters.

  • Types, how and where debug code executes
  • Connector and connectivity
  • Emulation Memory

In addition to lectures, the above topics, where required, will be demonstrated using appropriate tools – JTAG Emulators, and Software Debuggers.

Prerequisite: Knowledge in C Programming, any Assembly Language and Micro Processor and or Micro Controller Architecture is mandatory to attend this course.

Speaker's Profile:

P Seshan has about 25 years of industry experience. This includes extensive programming experience in Assembly, C, Pascal, FORTRAN,Modula 2,and Hardware board design and implementation, Project Management, and Multi functional engineering. He has expertise in Board bring up, Device Drivers and Emulators. He holds B.E (Hons) in Electrical and Electronics Engineering from Birla Institute of Technology and Sciences (BITS), Pilani, India, and PGDIM in General Management.

In addition to lectures, the above topics, where required, will be demonstrated using appropriate tools – JTAG Emulators, and Software Debuggers.

Course Fees: Rs 1500.00 ( One Thousand Five Hundred Rupees per attendee) .Course Fee includes Presentation Materials, Lunch and Tea and Coffee.

Interested ? Please Register on line now: Click here to Register.

For Group Registration please contact jtag@esds.in or 080-4214 6835